From c3e2abfb713391fe628e3a8810d462563bf1067a Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?J=C3=B6rg=20Thalheim?= <joerg@higgsboson.tk>
Date: Sat, 7 Mar 2015 12:03:22 +0100
Subject: [PATCH] fft index berechnung wieder in Software

---
 fft.c        | 10 ++--------
 fft_inst.tie | 15 ++-------------
 2 files changed, 4 insertions(+), 21 deletions(-)

diff --git a/fft.c b/fft.c
index 66a6eed..c3242da 100644
--- a/fft.c
+++ b/fft.c
@@ -121,15 +121,9 @@ int fix_fft(fixed fr[], fixed fi[], int m, int inverse)
             FFT_reg reg;
             fixed *reg_s = ((fixed*) &reg);
             
-            WUR_FFT_loop(m);
-            while(1)
+            for(i=m; i<n; i+=istep)
             {
-            	i = RUR_FFT_loop();
-            	
-                xtbool t;
-            	FFT_loop_check(n, istep, t, j);
-            	if(!t)
-            		break;
+                j = i + l;
                 
                 reg_s[3] = fr[i];
                 reg_s[2] = fr[j];
diff --git a/fft_inst.tie b/fft_inst.tie
index 7772240..ca16680 100644
--- a/fft_inst.tie
+++ b/fft_inst.tie
@@ -132,9 +132,6 @@ table SIN_wave 16 1024 {
 
 regfile FFT_reg 64 2 fftv
 
-state FFT_loop 32 add_read_write
-
-
 operation FFT_shift_check {in AR fr, in AR fi, out BR needs_shift} {}
 {
     // fr > 0
@@ -150,14 +147,6 @@ operation FFT_shift_check {in AR fr, in AR fi, out BR needs_shift} {}
 	assign needs_shift = jc1[0] | jc2[0] | jc3[4] | jc4[4];
 } 
 
-operation FFT_loop_check {in AR n, in AR istep, out BR t, out AR j} {inout FFT_loop}
-{
-	wire [4:0] cmpres = TIEcmp(FFT_loop, n, 1'b0);
-	assign t = cmpres[4];
-	assign FFT_loop = TIEadd(FFT_loop, istep, 1'b0);
-	assign j = TIEadd(FFT_loop, {1'b0, istep[15:1]}, 1'b0);
-}
-
 operation FFT_bit_reverse {inout AR m, out AR mr, in AR mm} {}
 {
 	wire [15:0] x = TIEadd(m, 0, 1'b1);
@@ -224,7 +213,7 @@ format flix64_0 64 { flix64_0_slot0, flix64_0_slot1 }
 
 slot_opcodes flix64_0_slot0 {
 	 ADD, ADDI, BGEU, BLTU, L16SI, L32I, MOVNEZ, NEG, NOP, S16I, SEXT, SRAI, SUB, FFT_twiddle,
-	 ld.FFT_reg, mv.FFT_reg, st.FFT_reg, FFT_loop_check, FFT_calc, FFT_shift_check, FFT_bit_reverse}
+	 ld.FFT_reg, mv.FFT_reg, st.FFT_reg, FFT_calc, FFT_shift_check, FFT_bit_reverse}
 slot_opcodes flix64_0_slot1 {
 	 ADD, ADDI, ADDX2, xt_widebranch18, BEQZ, BGE, BLT, BNEZ, FFT_twiddle, J,
-	 MOV.N, NOP, SEXT, SRAI, SUB, FFT_loop_check, FFT_calc, FFT_shift_check, FFT_bit_reverse}
+	 MOV.N, NOP, SEXT, SRAI, SUB, FFT_calc, FFT_shift_check, FFT_bit_reverse}