ctrl_wires: add x_to_a_shift_1 signal

2015-01-14 10:43:13 +01:00 · 2015-01-14 10:43:13 +01:00 · 861d93d2fa
parent 974a51b403
commit 861d93d2fa
1 changed files with 3 additions and 2 deletions
--- a/cadence/heron_ctrl_wires/functional/verilog.v
+++ b/cadence/heron_ctrl_wires/functional/verilog.v
@ -21,6 +21,7 @@ module heron_ctrl_wires (
  s_to_a_shift_1,
  s_to_b,
  x_to_a,
+  x_to_a_shift_1,
  x_to_b_shifted
 );