From b0dda9aef113029962625c0be6f8c21706e999ef Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?J=C3=B6rg=20Thalheim?= Date: Mon, 11 Nov 2013 10:27:40 +0100 Subject: [PATCH] add first Verilog example --- SQRT.v | 38 ++++++++++++++++++++++++++++++++++++++ sqrt.v | 1 - 2 files changed, 38 insertions(+), 1 deletion(-) create mode 100644 SQRT.v delete mode 100644 sqrt.v diff --git a/SQRT.v b/SQRT.v new file mode 100644 index 0000000..5449521 --- /dev/null +++ b/SQRT.v @@ -0,0 +1,38 @@ +module SQRT(A, Y, clk, reset); + +parameter width = 31; +`define width 31 + +input [width:0] A; +reg [width:0] x; +reg [width:0] old_x; +output [width:0] Y; + +always @(A) +begin + case(state) + WAIT: Y = 0; + CALC1: + x = CALC1 + state = OUTPUT + CALC2: + if (old_x <= x) begin + state = OUTPUT + end + OUTPUT: Y = Y_t; + default: Y = 0; + endcase +end + +initial begin : parameter_check + if (width < 1) begin + $display("ERROR: %m :\n Invalid value (%d) for parameter width (lower bound: 1)", width); + $finish; + end + if (width > 32) begin + $display("ERROR: %m :\n Invalid value (%d) for parameter width (upper bound: 32)", width); + $finish; + end +end + +endmodule diff --git a/sqrt.v b/sqrt.v deleted file mode 100644 index dc47137..0000000 --- a/sqrt.v +++ /dev/null @@ -1 +0,0 @@ -module incrementor()