heron_sqrt/Makefile

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Makefile
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C99?=c99
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PROJECT_ROOT=/home2/vlsi13/joth13/ICPRO/ice/heron/units/heron
TB_ROOT=$(PROJECT_ROOT)/df2/heron_top_tb_run1
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all: bericht check fsm_tb
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bericht:
cd bericht && make
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check: sqrt
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./sqrt
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sqrt: c/sqrt.c
$(C99) -lm -o sqrt c/sqrt.c
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fsm: verilog/heron_fsm.vcd
gtkwave verilog/heron_fsm.vcd
ctrl: verilog/heron_ctrl.vcd
gtkwave verilog/heron_ctrl.vcd
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fsm_tb: verilog/heron_fsm.vcd
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ctrl_tb: verilog/heron_ctrl.vcd
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%.vcd : %.vvp
vvp $<
%.vvp: %_tb.v %.v
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iverilog -o $@ -Iverilog verilog/heron_{fsm,ctrl}.v
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VERILOG_FILES=${shell find . -name verilog.v -type f}
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sync:
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cd cadence; rsync --relative --verbose --rsync-path=~/rsync-3.1.0/rsync -e ssh $(VERILOG_FILES:./cadence/%=%) eeets2:/home2/vlsi13/joth13/ICPRO/ice/heron/units/heron/cdslib/heron/
testbench:
ssh eeets2 $(PROJECT_ROOT)/df2/run-testbench.sh
rsync -av --inplace --rsync-path=~/rsync-3.1.0/rsync -avHz -e ssh eeets2:$(TB_ROOT)/heron_top_tb.vcd .
gtkwave heron_top_tb.gtkw