13 lines
248 B
Verilog
13 lines
248 B
Verilog
module heron_comma_fix (A,Y);
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parameter comma = 8;
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parameter comma_fix = comma / 2;
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input [31:0] A;
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output [31:0] Y;
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wire [31:0] Y;
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assign Y[(31 - comma_fix):0] = A[(31 - comma_fix):0];
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assign Y[31:(31 - comma_fix)] = 0;
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endmodule
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