Commit Graph

10 Commits

Author SHA1 Message Date
Jörg Thalheim cc1f79510e verilog finished 2014-01-10 13:22:11 +01:00
Jörg Thalheim a6e02f8e2f add control unit 2014-01-08 16:35:30 +01:00
Jörg Thalheim 1d70a432c9 . 2014-01-02 13:01:07 +01:00
Jörg Thalheim df3750364a correct fix-point arithmetic 2013-12-18 10:01:06 +01:00
Jörg Thalheim 588ee8b710 remove unneeded limit register 2013-12-13 10:36:19 +01:00
Jörg Thalheim b7399b014b bericht angefangen 2013-12-11 13:57:26 +01:00
Jörg Thalheim 1d6367161d . 2013-12-06 15:11:41 +01:00
Jörg Thalheim 86396fbadb . 2013-12-04 21:32:13 +01:00
Jörg Thalheim b0dda9aef1 add first Verilog example 2013-11-11 10:27:40 +01:00
Jörg Thalheim 7ea7968043 first 2013-11-11 10:26:27 +01:00